Example embodiments relate to a semiconductor memory device. More particularly, example embodiments relate to a nonvolatile memory device and an access method thereof.
Semiconductor memory devices may be divided into volatile memory devices and non-volatile memory devices. The volatile memory devices may perform read and write operations at a relatively high speed, and may lose data at power-off. Alternatively, the non-volatile memory devices may retain data after power-off. Therefore, the non-volatile memory devices may be preferable for storing contents which must be retained regardless of whether or not power is on.
Among the non-volatile memory devices, flash memory may be widely used with, for example, computers, memory cards, and the like. Flash memory may be divided into a NOR type and a NAND type according to an interconnection state of cells and bit lines. A NOR-type flash memory may have an array structure in which two or more cell transistors are connected in parallel with one bit line. NOR-type flash memory may store data using a Channel Hot Electron (CHE) method and may erase data using a Fowler-Nordheim (FN) tunneling method. A NAND-type flash memory may have an array structure in which two or more cell transistors are connected in series with one bit line. NAND-type flash memory may store and erase data using the FN tunneling method.
Each memory cell of a flash memory may store 1-bit data or multi-bit data. In the event that one memory cell stores 1-bit data, the memory cell may have a threshold voltage corresponding to any one of two threshold voltage states, for example data ‘1’ or data ‘0’. If one memory cell stores 2-bit data, the memory cell may have a threshold voltage corresponding to any one of four threshold voltage states. If one memory cell stores 3-bit data, the memory cell may have a threshold voltage corresponding to any one of eight threshold voltage states. Recently, various techniques for storing 4 or more data bits in one memory cell have been developed.